Cortex -M0+ 架构被设计用于给芯片制造商提供一道途径，使之能构建有超低能耗需求，又具有32位处理能力的微处理器。ARM 表示它已经着手这一新的处理器内核（大小 1mm x 1mm ）的蓝图设计。它说，该微处理器将比先前仅提供8位和16位处理能力的的微处理器能耗还要低1/3。

转载请注明： 英文原文： posted by on Tue 13th Mar 2012 16:17 UTC The Cortex -M0+ architecture is designed to provide chip-makers with the means to build microcontrollers that require "ultra low power" but are capable of 32-bit processing. Arm says it went back to the drawing board to create the new processor cores which measure 1mm by 1mm in size. It says the microcontrollers should draw around than their predecessors, which only offered 8 and 16-bit capabilities.